1. Field of the Invention
This invention relates generally to a method of manufacturing a high performance semiconductor device. More specifically, this invention relates to a method of manufacturing a high performance semiconductor device including forming a protect film over critical areas of the semiconductor device. Even more specifically, this invention relates to a method of manufacturing a high performance semiconductor device including forming a protect film over critical areas of the semiconductor device using a spin-on film.
2. Discussion of the Related Art
The manufacture of high performance semiconductor devices has, for the most part, devolved into performing certain basic processes to form the semiconductor device. For example, the manufacture of a semiconductor device having MOSFETs is basically a series of processes to form isolation structures such as field oxide (FOX) regions defining active areas in which MOSFETs are to be formed, the formation of the various structures making up the MOSFETs, the formation of a layer of dielectric material (ILD) to electrically separate one active layer of the semiconductor device from another active layer of the semiconductor device, and the formation of electrical interconnections between active components on the same layer (local interconnects) and between active components on different layers (vias).
Although the various manufacturing processes of the basis elements of semiconductor devices are well known, there are problems that decrease the yield of the manufacturing process. One of these problems is that there are critical areas on the semiconductor device that can cause the device to fail if one or more steps in the process are not perfectly executed. FIGS. 1A-1D illustrate one such problem.
FIG. 1A shows a partially completed semiconductor device having a single active area 102 and a single isolation structure 104. It has been found that the junction between the isolation structure 104 and the substrate 106 and region 110 is susceptible to subsequent process steps illustrated in FIGS. 1B-1D. FIG. 1B shows the formation of a layer of dielectric material 128 over etch stop layer 126 that has been formed on the semiconductor device 100. Etch stop layer 126 has several areas that are not flat, indicated at 130 and 132. When the layer of dielectric material 128 is selectively etched, such as at 131, it has been found that the etch process etches through the etch stop layer 126 at those areas of the etch stop layer 126 that are not flat. The etch process etches through the etch stop layer 126 into the underlying material as shown at 125 and 127. The etch process etches the isolation structure 104 material along the junction between the isolation structure 104 and the active area 102 as shown at 132 (FIG. 1C). A subsequent process of filling the area 131 with a conductive material, as shown in FIG. 1D, causes an electrical short between the substrate 106 and the region 110, which could be a drain or source of the MOSFET formed in the active area 102. This electrical short causes the device to fail and decreases the manufacturing yield.
Because current semiconductor devices have thousands, if not many millions of MOSFETs formed on a single device, the failure of any critical area such as one of the junctions as discussed above, will cause the semiconductor device to fail.
Therefore, what is needed is a method of manufacturing semiconductor devices that will decrease the incidence of failure of critical areas of the semiconductor devices.